Relatore
Descrizione
RISC-V is an open-source Instruction Set Architecture (ISA) designed to be simple, modular, and extensible, making it a versatile choice for a wide range of applications, from embedded systems to supercomputers. It is, therefore, an excellent ISA option for teaching computer architectures and assembly programming, and indeed it is starting to be adopted by a range of textbooks on the topic.
Given the low-level nature of the language, it is usually challenging for students to test the correctness of their code and run their programs in practice. This high entry barrier often results in a difficult learning experience, reducing the effectiveness of the learning process. Often, courses on assembly programming rely on simulators and emulators to expedite the learning curve. While they are effective in removing the complexities of running assembly code on real machines, they still lack mechanisms to provide feedback to students about their projects.
We here describe our experience in teaching Computer Architecture using Moodle. In addition to creating a vast amount of material in the form of classic self-evaluation quizzes, we have developed a pipeline to simplify the preparation of programming exercises using the RISC-V language. Our pipeline allows instructors to prepare questions and unit tests to verify the questions. We have been using this environment at the University of Turin for two academic years, with more than 500 students already using it for both self-study and exams. We describe our tools and initial experience using them. To increase impact, we make the source code and a large database of questions open to the community as open source.
